Design recipes for FPGAs : using Verilog and VHDL /
By: Wilson, Peter R. (Peter Reid) [author.].
Publisher: Amsterdam : Newnes, 2016Edition: Second edition.Description: xix, 369 p. : illustrations ; 27 cm.Content type: text | text | still image Media type: unmediated | unmediated Carrier type: volume | volumeISBN: 9780080971292:.Subject(s): Field programmable gate arrays -- Design and construction | VHDL (Computer hardware description language)![](/opac-tmpl/bootstrap/images/filefind.png)
Item type | Current library | Call number | Status | Date due | Barcode | Item holds |
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ATU Sligo Yeats Library Main Lending Collection | 621.395 WIL (Browse shelf(Opens below)) | Available | 0065460 |
Total holds: 0
Includes bibliographical references and index.
Peter Wilson provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modula structure, the book gives easy-to-find design techniques and templates at all levels, together with functional code, which engineers can easily match and apply to their application.